processor verification
英 [ˈprəʊsesə(r) ˌvɛrɪfɪˈkeɪʃən]
美 [ˈprɑːsesər ˌvɛrəfəˈkeɪʃən]
网络 处理器验证
双语例句
- Fast processor simulation model for SoC function verification
应用于SoC功能验证的快速处理器仿真模型 - Automatic Test Program Generation Focusing Pipeline Hazard in Processor Verification
针对流水冲突的微处理器功能验证程序的自动生成 - The verification method, used in a media DSP processor named Spock ( developed by Zhejiang University and C-sky Microsystems Co., Ltd), increase design automation level and save the verification time.
本验证方案成功应用于在浙江大学和中天微系统有限公司合作开发的拥有自主知识产权的媒体DSP处理器Spock的设计中，提高了验证自动化及标准化水平，缩短了设计过程中验证的时间。 - Formal model of FFT processor and its verification
FFT处理机的形式化模型及正确性验证 - Chapter 4 analyzed the architecture of the master processor and did the verification and synthesis work to its sub module.
第五章分析了DSP的架构，并对算术逻辑单元和乘/累加器进行了验证与综合，然后在乘/累加器性能比较的基础上证明了本方案中DSP的优越性。 - Except internal structure of this processor is presented, hardware principle diagram and design of planning and wiring for PCB are also given in detail. The procedures of test and verification after establishing the hardware platform are described.
在介绍该处理器内部结构的基础上，详细给出了硬件原理图和PCB布局布线的设计，并且阐述了硬件平台搭建完成后的测试和验证的步骤。 - The Research and FPGA Realization of High-Performance Configurable FFT Processor is presented in this dissertation. It includes the system architecture design and subsystem architecture design, algorithm verification and implementation.
本文主要研究高速可配置FFT处理器和以及其FPGA实现，包括从算法设计、算法验证、系统构架设计、各个模块的设计和实现到FPGA的下载实现和测试整个流程。 - Base on the study of architecture and the design method of X processor, this paper raise a new verification method for full-custom microprocessors.
为了解决X微处理器的验证问题，本文通过对其结构和设计特点进行分析，提出了一种系统的全定制微处理器验证方法。 - Design and Implementation of VLIW Processor System Level Verification Platform
VLIW处理器系统级验证平台的设计与实现 - The increasing complexity of processor structure makes the efficient verification onthe performance of processor becoming increasingly important and critical.
随着处理器结构的日益复杂使得对处理器功能进行有效验证变得越来越重要和关键。 - Tiled Processor Architecture ( TPA), as a many-core architecture design with good scalability, can cope well with challenges such as power consumption, wire delay, design and verification complexity in nano technology.
分片式处理器体系结构（TPA）能够很好地应对纳米工艺代的功耗、线延迟、设计和验证复杂度等一系列问题，是一种具有良好的性能扩展潜力的众核处理器体系结构设计方案。 - At present, most of the processor functional simulation model are implemented by C or C++ language, that only a serial or multi-threaded simulation and verification is satisfied.
当前，大部分处理器功能仿真模型为C或C++语言所写，只能进行串行或者多线程仿真与验证。 - Finally, combined with the Ethernet MAC layer protocol processor designing, developing environment and verification tools of the system will be introduced and the function verification of traditional send/ receive data and assertion verification program of the finite state machine will be given in this thesis.
最后，介绍了本系统的开发环境和验证工具，结合以太网MAC协议处理器，分别给出了传统数据发送／接收的功能验证和有限状态机的断言验证方案。 - Achieved through the SOC, the system frequency eventually went to more than 100M. T Core processor hardware architecture design has passed the pre-simulation, verification and final board-level system debugging.
通过SOC实现后，系统频率最终跑到100M以上。TCore处理器的硬件架构设计已经通过了前期的仿真、验证及最后的板级系统调试。